Senior Analog and Mixed Signal Verification
发布时间：2022-6-23 15:24
发布者：KT咨询
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NO.594-【猎头职位：上海需要多位 Senior Analog and Mixed Signal Verification】联系人：Chloe-Zhang,邮箱：hr@kthr.com，微信也可查询职位了！打开手机微信，搜号码“KTHR_COM”或查找微信公众帐号“KT人才”或扫描以上二维码即可添加，欢迎大家关注！ 岗位职责： 1、Participate in the verification flow optimization to improve automation and productivity to produce high-quality products. 2、Read IP/SoC design specs and integration guide to understand the verification requirements and build corresponding test plans. 3、Responses to build block/SoC testbench based on UVM methodology and create C test cases. 4、The responsibilities includes building test run and regression flow. Triage failures in regression and help designer root cause the bug. 5、Work includes Build various metrics (passing rate, functional coverage, etc) and analyze these metrics. 6、Analyze functional/code coverage result and identify the coverage holes. Work with design engineer to improve the coverage score. 7、Take SoC RTL/GLS/LOW Power verification on fullchip for owned IPs. 岗位要求： 1、Bachelor above degree in Microelectronics or related major; Master above preferred. 2、3+years of experience in analog and mixed signal verification (AMS) 3、Key Skills & Knowledge 4、Must have knowledge on Verilog/SystemVerilog/C/Verilog-AMS/weal . 5、Understanding of basic analog building blocks and mixed signal blocks. 6、Good in mixed signal verification approach, flow, debugging skills. 7、Experience in mixed-signal test-benches creation for IP/SoC verification. 8、Must have knowledge on APB/AHB protocols 9、At least good at one of the script programing lanange : Perl, Shell,Python,tcl or makefile. 10、Experience in metric based Verification closure using Code and Functional coverage 11、Strong analytical and problem solving skills. 12、Experience in UVM-AMS or UVM verification environment creation is plus. 13、Fluent English (both written and spoken) and excellent communication skills is plus. 福利：五险一金 年假15天 补充商业医疗 过节大红包
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