新书！The gm/ID Methodology, a sizing tool for low-voltage analog CMOS Circuits
发布时间：2010-8-13 14:33
发布者：老郭
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The gm/ID Methodology, a sizing tool for low-voltage analog CMOS Circuits: The semi-empirical and compact model approaches (Analog Circuits and Signal Processing) By Paul G.A. Jespers 
The gm_ID Methodology, a sizing tool for low-voltage analog CMOS Circuits.rar
(2.58 MB)
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