DDR controllerPHY design & verification (staff) Engineer
发布时间：2017-5-12 15:49
发布者：KT咨询
关键词：
Design
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NO.78-【猎头职位：上海需要多位 DDRcontrollerPHY design & verification (staff) Engineer】联系人：Chole-Zhang,邮箱：hr@kthr.com，微信也可查询职位了！打开手机微信，搜号码“KTHR_COM”或查找微信公众帐号“KT人才”或扫描以上二维码即可添加，欢迎大家关注！ Jobdescription： 1. Maintain and develop current DDR234/LPDDR234 IP. 2. Deep research on current controller/PHY architecture andmicro-architecture. 3. Solve the simulation/integration/timing issue from the customer. 4. Add features on current DDR IP and validate. 5. Make documents – Diagram/table/description using word and visio. Qualificationrequirements： 1. Familiar with AXI/DDR(JEDEC)/DFI specification. 2. 3+ years of experience on digital design or verification. 3. Familiar with scripts – Perl and tcl. 4. Familiar with timing concept and SDC. 5. Highly organized and self-motivated. 6. Ability to work with teammates. 7. Good language and communication skills in English for both spoken andwritten. 福利：丰厚bonus+在职硕士+人才公寓  |
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