always @(posedge clk_sys or negedge rst_sys_n)
begin
if(!rst_sys_n) work_en_1d <= #U_DLY 1'b0;
else work_en_1d <= #U_DLY work_en;
end
assign work_en_pos = (~work_en_1d)&work_en;
always @(posedge clk_sys or negedge rst_sys_n)
begin
if(!rst_sys_n) cnt_cycle[25:0] <= #U_DLY 26'd0;
else if(work_en_pos) cnt_cycle[25:0] <= #U_DLY CNT_INIT;
else if....
else....
end
work_en_pos是干什么用的?时钟一来不就变成0了吗。那else if(work_en_pos) cnt_cycle[25:0] <= #U_DLY CNT_INIT;这句不是永远也执行不了了吗? |