中芯国际成功研发65纳米产品工艺
发布时间:2010-7-22 09:49
发布者:嵌入式公社
中芯国际和Virage Logic拓展伙伴关系至40纳米低漏电工艺 出自:美通社 编辑:Jessica Cao 备受半导体产业信赖的IP供应商Virage Logic公司 (NASDAQVIRL) 和中国最先进的半导体制造商中芯国际集成电路有限公司(中芯国际,纽约证券交易所交易代码:SMI,香港联交所交易代码:0981.HK)日前宣布其长期合作伙伴关系扩展到40纳米(nanometer)的低漏电(low-leakage)工艺技术。Virage Logic 公司和中芯国际从最初的130纳米工艺合作起便为双方共同的客户提供具高度差异的 IP,涵盖的工艺广泛还包含90纳米以及65纳米。根据协议条款,系统级芯片(SoC)设计人员将能够使用 Virage Logic 开发的,基于中芯国际40纳米低漏电工艺的 SiWare? 存储器编译器,SiWare? 逻辑库,SiPro? MIPI 硅知识产权 (IP) 和 Intelli? DDR IP。除此之外这方面的一个新协议的关键将提供中芯国际 Virage Logic 先进的 STAR? 记忆系统和 STAR? 量率加速器工具,以加速中芯国际关于40纳米低漏电工艺记忆的技术开发,测试以及产量的提升。 “作为中国首屈一指的代工厂,我们与 Virage Logic 公司拓展合作伙伴关系将使中芯国际能够提供更多业界领先的40纳米低漏电工艺的半导体 IP,这不仅能满足来自中国本地的系统级芯片开发人员的需要,亦将助益我们开发全球半导体市场,”中芯国际资深副总裁兼首席商务官季克非表示。“中芯国际正采取积极措施提升客户更先进的技术。我们之前已经有客户正积极利用中芯国际的65纳米低漏电工艺及 Virage Logic 公司相关 IP 进行芯片项目的开发。与 Virage Logic 的合作关系可提供我们的客户将来迁移到40纳米的一个相对容易的途径。因应中芯国际市场营销的成长,我们期待着与 Virage Logic 长久的合作以满足日益增长的市场需求。” “我们很高兴与中芯国际扩大合作伙伴关系从最初的130纳米工艺到现在的40纳米低漏电工艺。Virage Logic 开发的业界领先的 IP 产品将能够提供客户更多的选择使中芯国际能成为客户首选的代工厂,” Virage Logic 公司市场和销售执行副总裁 Brani Buric 表示。“这次联合协议是 Virage Logic 公司透过业界领先的晶圆代工厂来拓展公司业务策略的延续,同时也更巩固了中芯国际对其客户提供完整 IP 解决方案的承诺。” SMIC extends Virage IP deal to 40-nm Peter Clarke 7/22/2010 11:55 AM EDT LONDON — Intellectual property licensor Virage Logic Corp. and foundry Semiconductor Manufacturing International Corp. have extended their partnerhip to include a 40-nm low-leakage process (LL) technology. In May the companies announced cooperation at 65-nm minimum geometry. Building on the successful partnership that was initially established on the 130-nm process technology, Virage Logic and SMIC have collaborated to provide customers with IP on a broad range of SMIC's process technologies including 90nm and 65nm. Under the terms of the latest agreement, system-on-chip (SoC) designers will have access to Virage Logic's SiWare Memory compilers, SiWare logic libraries, SiPro MIPI and Intelli DDR IP on SMIC's 40nm LL process. In addition, one key provision of the latest agreement provides SMIC access to Virage Logic's Star Memory System and Star Yield Accelerator tools to accelerate the development, testing and yield enhancement of SMIC's 40nm LL memory related technology. "As the premier foundry in China, our expanded partnership with Virage Logic will enable SMIC to offer the industry leading semiconductor IP on our 40nm LL process to meet the needs of not only the Chinese system-on-chip (SoC) developers but the global semiconductor market," said "Currently we have a number of customers with projects leveraging SMIC's 65nm LL node. The strategic IP agreement with Virage Logic will enable us to offer these customers an easy migration path to our 40nm LL process," said Chris Chi, senior vice president and chief business officer of SMIC, in a statement issued by Virage Logic. |
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